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~2 min readCHIP-8 Architecture

Fetch-Decode-Execute

Each instruction is 2 bytes, big-endian. Fetch:

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Decode patterns by hex digits. CHIP-8 instructions are usually written as 4 hex digits:

Pattern	Mnemonic	Effect
00E0	CLS	Clear display
00EE	RET	Return from subroutine
1NNN	JP NNN	Jump to NNN
2NNN	CALL NNN	Call subroutine at NNN
3XKK	SE VX, KK	Skip next if VX == KK
4XKK	SNE VX, KK	Skip next if VX != KK
5XY0	SE VX, VY	Skip if VX == VY
6XKK	LD VX, KK	VX = KK
7XKK	ADD VX, KK	VX += KK
8XY0..7,E	LD/AND/OR/etc	ALU ops on VX, VY
9XY0	SNE VX, VY	Skip if VX != VY
ANNN	LD I, NNN	I = NNN
BNNN	JP V0, NNN	Jump to V0 + NNN
CXKK	RND VX, KK	VX = random & KK
DXYN	DRW VX, VY, N	Draw N-byte sprite at (VX, VY)
EX9E	SKP VX	Skip if key VX pressed
EXA1	SKNP VX	Skip if key VX not pressed
FX07	LD VX, DT	VX = delay timer
FX0A	LD VX, K	Wait for key, store in VX
FX15	LD DT, VX	Delay timer = VX
FX18	LD ST, VX	Sound timer = VX
FX1E	ADD I, VX	I += VX
FX29	LD F, VX	I = address of digit VX in font set
FX33	LD B, VX	BCD of VX into memory[I, I+1, I+2]
FX55	LD [I], VX	Store V0..VX into memory[I..]
FX65	LD VX, [I]	Load V0..VX from memory[I..]

Decoder:

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Dispatch:

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Most opcodes are simple; DRW (sprite drawing) is the complex one.

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